This invention relates generally to impedance matching networks and more particularly to microwave impedance matching networks.
As is known in the art, for broadband high frequency applications, it is often necessary to use impedance matching networks for coupling a microwave frequency transmission line to a field effect transistor (FET). For example, the interelectrode capacitance of an FET may vary over a predetermined range for different FETs of the same device type. This variation of interelectrode capacitance complicates the impedance matching between the microwave transmission line and the FET since the capacitive component variation causes each FET to require a customized impedance matching network. Several approaches have been used in the prior art to fabricate the impedance matching networks. One approach is to use monolithic integrated circuit techniques to fabricate, on a common substrate, the transmission line, the matching network, and the FET device. One disadvantage with this approach is that precise process control is required because subsequent circuit adjustment in the matching network is not generally possible. A second disadvantage with this approach is that the high development and capital costs generally incurred in the production of monolithic microwave integrated circuits generally cannot be justified without a very large production volume. A second approach used in the prior art is to provide a hybrid circuit including metal on semiconductor (MOS) or metal on metal (MOM) capacitors. These capacitors are incorporated in an impedance matching circuit, for example, either by mounting them directly on the ground plane without a substrate or by mounting them on top of the substrate with plated holes passing through the substrate to the ground plane. One disadvantage with the use of MOS or MOM capacitors is that fabrication of such impedance matching networks requires additional processing steps for assembly, thus increasing the cost of the circuits and increasing the complexity of fabrication of the circuits. A second disadvantage is that the value of capacitance for MOS and MOM lumped capacitors is generally difficult to control and thus such capacitors provide less flexibility in providing customizable impedance matching networks.